Publications

• A Double-Tail Sense Amplifier for Low-Voltage SRAM in 28nm Technology
• Reprogrammable redundancy for cache Vmin reduction in a 28nm RISC-V processor
• Strober: Fast and Accurate Sample-Based Energy Simulation for Arbitrary RTL
• Sub-microsecond Adaptive Voltage Scaling in a 28nm FD-SOI Processor SoC
• An Agile Approach to Building RISC-V Microprocessors
• A RISC-V Vector Processor With Simultaneous-Switching Switched-Capacitor DC–DC Converters in 28 nm FDSOI
• A RISC-V Vector Processor with Tightly-Integrated Switched-Capacitor DC-DC Converters in 28nm FDSOI
• Joint Impact of Random Variations and RTN on Dynamic Writeability in 28nm Bulk and FDSOI SRAM