Abstract- This paper presents a sample-based energy sbnu lation methodology that enables fast and
accurate estimations of performance and average power for arbitrary RTL designs. Our approach Wies
an FPGA to sbnultaneously sbnulate the performance of an RTL design and to collect samples
containing exact RTL state snapshots. Each snapshot is then replayed in gate-level sbnulation,
resulting in a workload-specific average power estimate with confidence intervals. For arbitrary
RTL and workloads, our methodology guarantees a minimum of four orders-of-magnitude speedup over
commercial CAD gate-level sbnulation tools and gives average energy estimates guaranteed to be
within 5% of the true average energy with 99% confidence. We believe our open-source sample-based
energy simulation tool Strober can not only rapidly provide ground truth for more abstract power
models, but can enable productive design-space exploration early in the RTL design process.
Index 7Bnns-Design, Energy, Experimentation, FPGA, Hard ware, Modeling, Performance, Power
estimation, Statistical sam pling