Per-Core DVFS With Switched-Capacitor Converters for Energy Efficiency in Manycore Processors

Integrating multiple power converters on-chip
improves energy efficiency of manycore architectures. Switchedcapacitor
(SC) dc–dc converters are compatible with conventional
CMOS processes, but traditional implementations suffer from
limited conversion efficiency. We propose a dynamic voltage and
frequency scaling scheme with SC converters that achieves high
converter efficiency by allowing the output voltage to ripple and
having the processor core frequency track the ripple. Minimum
core energy is achieved by hopping between different converter
modes and tuning body-bias voltages. A multicore processor
model based on a 28-nm technology shows conversion efficiencies
of 90% along with over 25% improvement in the overall chip
energy efficiency.
Index Terms—Dynamic voltage and frequency scaling (DVFS),
multicore processors, switched capacitor (SC).