TALK: Michael B. Taylor – UCSD, on Mon, July 29 at 12pm in 430 Soda

7/29/13 12:00 pm - 1:30 pm

Michael B. Taylor – UCSD,  Talk on Mon, July 29 at 12pm in 430 Soda

Speaker: Michael B. Taylor, UC San Diego

Title: A Landscape of the New Dark Silicon Design Regime

Abstract: Due to the breakdown of Dennard scaling, the percentage of a silicon chip that can switch at full frequency is dropping exponentially with
each process generation. This utilization wall forces designers to ensure that, at any point in time, large fractions of their chips are effectively dark silicon, i.e., significantly underclocked or idle for large periods of time.

As exponentially larger fractions of a chip’s transistors become dark, silicon area becomes an exponentially cheaper resource relative to power and energy consumption. This shift is driving a new class of architectural techniques that “spend” area to “buy” energy efficiency.  All of these techniques seek to introduce new forms of heterogeneity into the computational stack.

This talk examines four key approaches–the four horsemen–that have emerged as top contenders for thriving in the dark silicon age. Each class carries with its virtues deep-seated restrictions that require a careful understanding of the underlying tradeoffs and benefits.  Further, we propose a set of dark silicon design principles, and examine how one of the darkest computing architectures of all, the human brain, trades off energy and area in ways that provide potential insights into future directions for computer architecture.

Bio: Michael B. Taylor is an Associate Professor of Computer Science and Engineering at UC San Diego.  His research interests focus around the design of novel computing artifacts. His ASPLOS 2010 paper was the first peer-reviewed paper to identify and concisely describe the origins of the Dark Silicon problem, and to propose heterogeneity as a solution. His recent projects include Kremlin, a tool best described as “like gprof, but for parallelization”; GreenDroid, jointly led with Steven Swanson; and SD-VBS, a vision benchmark suite. As a PhD student, Michael was the lead architect of the 16-core MIT Raw processor, which was later commercialized into the 100-core Tilera chips. Prior to that, he co-authored the first version of the Connectix VirtualPC x86-to PowerPC translator, and hacked microkernels at Apple. He received the NSF CAREER Award in 2009, a PhD from MIT in 2007, and an AB from Dartmouth College in 1996.

Leave a Reply