Speaker: Boris Babayan, Intel Fellow, Software and Services Group, Director of Architecture, Intel Corporation
Title: Computer Technology Basics: Past, Present, and Future
Abstract: The speaker will propose a new approach to CPU architecture design, when only the algorithm and data dependency would limit the theoretical speed of execution. This algorithm centric architecture brings a new level of power efficiency and dynamic range, which leads to a new post-superscalar CPU era.
A detailed historical analysis of how CPU architecture has been developed during the past 60 years, why we see stagnation in CPU architecture now, and as the result of such analysis – if there is a way out of this crisis in processor architecture.
This critical analysis of the basic features of computer technology (High Level Language, processor architecture, OS kernel and compiler) will be performed in two orthogonal dimensions
- Functionality of primitive data types and corresponding operations (space component)The way how these operations are executed in time – parallelism (time component)
- The way how these operations are executed in time – parallelism (time component)
The most significant steps, taken in this area in the past, will be discussed.
Possible future steps in both above mentioned components (functionality and parallelism) are suggested, which allows reaching practical results close to the best possible ones for two cases:
- For architecture semantically fully compatible with existing architectures (ARM, x86, POWER, etc.) – post superscalar architecture
- For computer technology, which is free of any compatibility constraints
In the first case we estimate 3x – 4x higher Single Thread performance over the best current superscalar CPUs and two times for MT performance (for the same area) over existing architectures with better power efficiency and decreased design complexity.
For the second case we can predict the following advantages:
- Result of the functional (space component) improvements
Have been implemented the in Russian widely used Elbrus-1, -2 computers
- Architecture support for real High Level programming
- SW debugging is about 10 times easier
- Complete solution of security protection problem
- Clean (and about 4x times smaller) OS kernel with user level programming – no need for privileged mode
- Result of parallel execution (time component) improvement
- Possibility to use all available HW (about 60 clusters) even for Single Thread jobs
- Parallel execution of procedures
- Dramatic increase in performance – both ST and MT
- General result
Due to ability to use all available HW and the fact that the performance results are close to algorithmic constraint, this computer technology will be really absolutely universal among the programmable architectures.
The following result should be investigated more carefully, however, there is a big probability that it can support well all applications, which currently require specialized equipment like:
- Machine learning
- Computer vision
Bio:Boris Babayan has worked in the design of computer architecture for over 50 years and today is known as an industry-recognized expert in the area. Until 1990, his work was largely unknown in the west. The mention of his name in the Soviet Union was synonymous with advanced computer design. Boris Babayan and his team designed and developed in the past a few generations of Elbrus line computers broadly adopted for mission critical applications in the Soviet Union and Russia. He conceptualized highly parallel microprocessor architecture of Elbrus 2, which had a new technology in support of high level programming and security feature, and Elbrus 3 (VLIW) with a corresponding optimizing compiler, binary translation technology and suggested innovative technical solutions to increase the efficiency of HW/SW co-design.
In August 2004 Babayan joined Intel as a Fellow and Director of Architecture within the Software and Services Group (SSG) when Intel acquired the Elbrus MCST engineering team- the leading designer of CPUs in Russia. Today Boris is primarily focused on the evolution and advancement of computer architectures and system software, design of innovative technologies for Intel’s future microprocessors. He leads worldwide efforts related to compiler technologies that enable applications to run on multiple computer architectures without recompiling.
Prior to coming to Intel, he held numerous positions, including Director of the Institute of Microprocessor Computer Systems for the Russian Academy of Science, Chairman of Elbrus International, and CTO at the Moscow Center for SPARC Technologies. From 1956-1996, Babayan worked at the Institute of Precise Mechanics and Computer Technology led by Sergey A. Lebedev, eventually becoming chief of the hardware and software divisions.
In 1957 Babayan graduated from the Moscow Institute of Physics and Technology, founded by two eventual Nobel Laureates, Pyotr Kapitsa and Lev Landau. He was the first computer science student in all of Russia—a field that was originally called “machine mathematics.” In 1964 he completed his Ph.D. and earned his Dr. Sci. in 1972. Babayan has been a corresponding member of the Russian Academy of Science since 1984. He has also served as Professor and Chair of computer science in the Moscow Institute of Physics and Technology since 1996 to nowadays.
Babayan received two of the Soviet Union’s highest honors: the State Prize (1974) and the Lenin Prize (1987) awards. He authored over 100 patents, innovations and publications in various areas of processor and computer architecture design.