The ASPIRE Laboratory started in 2013 as a 5-year research project that recognized the shift from transistor-scaling-driven performance improvements to a new post-scaling world where whole-stack co-design is the key to improved efficiency. Our goal has been to use deep hardware and software co-tuning to achieve the highest possible performance and energy efficiency for future mobile and rack computing systems.
For more information on the event, click HERE
(Note: registration is now closed. Please contact aspire-admin@eecs.berkeley.edu with any questions)
Date: Tuesday, December 5, 2017
Time: 9:00AM – 6:00PM
Location: California Memorial Stadium, Berkeley